1. Field of the Invention
The present invention relates to an image-taking apparatus and a solid-state image-taking element, and in particular, to a technology for transfer control of signal charges stored in a photoelectric conversion element.
2. Description of the Related Art
In recent years, a CCD (Charge-Coupled Device) used for an image-taking device of a digital camera or a digital video camera is required to read and process a signal obtained from the CCD at high speed in conjunction with an increase in effective sensor resolution and a demand for high resolution. Density growth and sped-up processing of the CCD render a drive frequency thereof higher, and complexity of the CCD's structure increases wiring impedance. Consequently, various problems are arising, such as increase in unnecessary radiation, deterioration of an S/N ratio and increase in power consumption. As for moving image shooting, a readout speed of the CCD influences continuity of shot images so that various inventions are made in order to increase readout speed of the CCD.
FIG. 22 shows an example of a solid-state image-taking device in the past. FIG. 22 is a plan view showing a structure of a light receiving surface of a CCD 212. Pixels 102 are placed like a queue in a light receiving area 100 of the CCD 212. A vertical sequence is a row, a horizontal sequence is a line, and they are row 1, row 2 . . . from the right and line 1, line 2 . . . from the top.
The pixels 102 have a honeycomb structure in which central points of geometrical forms of the pixels are arranged by being alternately displaced by a half of a pixel pitch (½ pitch) in a line direction and in a row direction. To be more specific, it is the structure in which, between mutually adjacent lines (or rows) of the pixels 102, a pixel arrangement in the one line (or row) is placed to be relatively displaced by approximately a half of arrangement spacing in the line direction (or in the row direction) against the pixel arrangement in the other line (or row).
Between pixel rows, a vertical transfer route 104 for reading charges stored in the pixels is placed close to each pixel row as if snaking its way. The vertical transfer route 104 has a transfer electrode 105 for having a vertical transfer drive pulse signal (VCCD pulse) applied connected thereto. The transfer electrode 105 is shown in a frame of the vertical transfer route 104.
The light receiving area 100 has a VCCD drive circuit 110 for applying the VCCD pulse to the transfer electrode 105 placed on the right thereof.
Furthermore, the light receiving area 100 has a horizontal transfer route (HCCD) 112 for horizontally transferring signal charges moved from the vertical transfer route 104 placed on the downside thereof (final downside stage of the vertical transfer route 104). And the light receiving area 100 has a horizontal transfer route 114 for horizontally transferring the signal charges moved from the vertical transfer route 104 on the upside thereof (final upside stage of the vertical transfer route 104).
The horizontal transfer route 112 and the horizontal transfer route 114 are transfer-controlled by a two-phase driving pulse, and the charges are transferred from the right to the left in FIG. 22. The final stages thereof (leftmost stage in FIG. 22) are connected to an output portion 62 and an output portion 64 respectively.
The output portion 62 and the output portion 64 include an output amplifier (floating diffusion amplifier) which detects the charges of inputted signal charges and outputs them as signal voltage to an output terminal. Thus, signals photoelectrically converted by the pixels 102 are outputted as a dot sequential signal row.
To be more specific, if light gets incident on the pixels 102, the charges according to a light volume thereof are stored in photo-diodes of the pixels 102. And the charges stored in the pixels 102 are read to the vertical transfer route 104 corresponding to each pixel according to a field shift pulse.
On the vertical transfer route 104, the charges read from the pixels 102 are sequentially transferred to the horizontal transfer route 112 or the horizontal transfer route 114 by the VCCD pulse. Details of vertical transfer control over the charges will be described later.
If the charge per pixel line is transferred to a lowermost or an uppermost stage (a portion connected to the horizontal transfer route) of the vertical transfer route 104, the charge is read from the vertical transfer route 104 to the horizontal transfer route 112 or the horizontal transfer route 114 according to a transfer gate pulse.
According to the above-mentioned structure, the charge stored in each pixel is read to the vertical transfer route 104 placed on the right side thereof. To be more specific, a stored charge is read to a vertical transfer route 104A in a first row (odd-numbered row) as to the pixel row in the first row, and the stored charge is read to a vertical transfer route 104B in a second row (even-numbered row) as to the pixel row in the second row.
The vertical transfer route 104A transfers the charges to the horizontal transfer route 112. As for the vertical transfer route 104B, if a forward VCCD pulse for transferring the charges to the horizontal transfer route 114 is applied, the charges of the pixels corresponding to G and R (pixels in the odd-numbered rows) are transferred to the horizontal transfer route 112 so that image-taking signals corresponding thereto are outputted from the output portion 62. And the charges of the pixels corresponding to G and B (pixels in the even-numbered rows) are transferred to the horizontal transfer route 114 so that the image-taking signals corresponding thereto are outputted from the output portion 64.
The vertical transfer route 104A transfers the charges to the horizontal transfer route 114. As for the vertical transfer route 104B, if a reverse transfer VCCD pulse for transferring the charges to the horizontal transfer route 112 is applied, the charges of the pixels corresponding to G and R (pixels in the odd-numbered rows) are transferred to the horizontal transfer route 114 so that the image-taking signals corresponding thereto are outputted from the output portion 64. And the charges of the pixels corresponding to G and B (pixels in the even-numbered rows) are transferred to the horizontal transfer route 112 so that the image-taking signals corresponding thereto are outputted from the output portion 62.
As for the solid-state image-taking device disclosed in Japanese Patent Application Publication No. 8-125158, a proposal is made as to a method of placing the horizontal transfer routes above and below an image-taking area, cross-wiring a wiring electrode of the vertical transfer route for transferring the charges from the photo-diodes to the horizontal transfer route, and controlling the vertical transfer direction row by row by using a common driving pulse. For instance, it is possible, by the transfer control, to read the charges to a downward vertical transfer route in the case of the odd-numbered rows and read them to an upward vertical transfer route in the case of the even-numbered rows.